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Alternator Voltage Regulator
The MC33092A is specifically designed for voltage regulation and Load Response Control (LRC) of diode rectified alternator charging systems, as commonly found in automotive applications. The MC33092A provides load response control of the alternator output current to eliminate engine speed hunting and vibration due to sudden electrical loads which cause abrupt torque loading of the engine at low RPM. Two load response rates are selectable using Pin 11. The timing of the response rates is dependent on the oscillator frequency. In maintaining system voltage, the MC33092A monitors and compares the system battery voltage to an externally programmed set point value and pulse width modulates an N-channel MOSFET transistor to control the average alternator field current. * Forced Load Response Control (LRC) with Heavy Load Transitions at Low RPM * Capable of Regulating Voltage to 0.1 V @ 25C
MC33092A
ALTERNATOR VOLTAGE REGULATOR
SEMICONDUCTOR TECHNICAL DATA
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* * * * * * * * * * * *
Operating Frequency Selectable with One External Resistor < 0.1 V Variation over Speed Range of 2000 to 10,000 RPM < 0.4 V Variation over 10% to 95% of Maximum Alternator Output Maintains Regulation with External Loads as Low as 1.0 A Load Dump Protection of Lamp, Field Control Devices, and Loads Duty Cycle Limit Protection Provides High Side MOSFET Control of a Ground Referenced Field Winding Controlled MOSFET and Flyback Diode Recovery Characteristics for Minimum RFI < 2.0 mA Standby Current from Battery @ 25C < 3.0 mA Standby Current from Battery Over Temperature Range Optional 2.5 or 10 sec. LRC Rate Control (Osc. Freq. = 280 kHz) Undervoltage, Overvoltage and Phase Fault (Broken Belt) Detection
Filter Buffer Remote Sense
20 1
DW SUFFIX PLASTIC PACKAGE CASE 751D (SO-20L)
PIN CONNECTIONS
1 2 3 4 5 6 7 8 9
20 Vref 19 Undervoltage 18 Source 17 Gate 16 NC 15 Gnd 14 VCC1 13 VCC3 12 Supply Regulation 11 Rate (Top View)
Simplified Block Diagram
FB 1 UV 19 Vref 20 Vref O 8 Bandgap Reference Lost Sense Circuit 2 Sense (Remote) 12 X1 Supply Reg (Local) 10 Phase Counter 12 Prescaler (24) Oscillator Osc. Adjust 9 Oscillator 11 Rate DAC Counter (28) 4 Divide By (1/12/48) Control Logic 8 Up/Down Counter (24) 6 15 Gnd Regulate Output Control MC33092A Bias Undervoltage Signal Combiner and Switch Low Pass Filter Load Dump Buff Power Up/Down Circuit VCC1 14 Power Supply Charge Pump VCC3 13
Lamp Collector Lamp Base Gnd
17 Gate 18 Source 3 Lamp Coll.
Oscillator Adjust Vref O Oscillator
Phase 10
Overvoltage
Lamp Control Logic
4 Lamp Base 5 Gnd
ORDERING INFORMATION
Device MC33092ADW Operating Temperature Range TA = - 35 to +125C Package SO-20L
Rev 0
7
(c) Motorola, Inc. 1997
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MAXIMUM RATINGS
Rating Power Supply Voltage Load Dump Transient Voltage (Note 1) Negative Voltage (Note 2) Power Dissipation and Thermal Characteristics Maximum Power Dissipation @ TA = 125C Thermal Resistance, Junction-to-Ambient Operating Junction Temperature Operating Ambient Temperature Range Storage Temperature Range
NOTE: ESD data available upon request.
Symbol Vbat +Vmax -Vmin PD RJA TJ TA Tstg
Value 24 40 -2.5 867 75 +150 -35 to +125 -45 to +150
Unit V V V mW C/W C C C
ELECTRICAL CHARACTERISTICS (External components per Figure 1, TA = 25C, unless otherwise noted).
Characteristic Symbol Min Typ Max Unit DC CHARACTERISTICS Regulation Voltage (Determined by external resistor divider) Regulation Voltage Temperature Coefficient Suggested Battery Voltage Operating Range Power Up/Down Threshold Voltage (Pin 3) Standby Current, Vbat = 12.8 V, Ignition off, TA = 25C Vbat = 12.8 V, Ignition off, -35C TA 125C Zero Temperature Coefficient Reference Voltage, (Pin 8) Band Gap Reference Voltage (Pin 20) Band Gap Reference Temperature Coefficient Sense Loss Threshold (Pin 2) Phase Detection Threshold Voltage (Pin 10) Phase Rotation Detection Frequency (Pin 10) Undervoltage Threshold (Pin 19) Overvoltage Threshold (Pin 2, or Pin 12 if Pin 2 is not used) Load Dump Threshold (Pin 2, or Pin 12 if Pin 2 is not used) SWITCHING CHARACTERISTICS Fundamental Regulation Output Frequency, (Pin 17) (Clock oscillator frequency divided by 4096) Suggested Clock Oscillator Frequency Range, (Pin 9) (Determined by external resistor, RT, see Figure 6) Duty Cycle (Pin 17) At Start-up During Overvoltage Condition Low/High RPM Transition Frequency (Pin 10) LRC Duty Cycle Increase Rate Low RPM Mode (LRCFreq < 247 Hz), Pin 11 = Open (Slow Rate) Low RPM Mode (LRCFreq < 247 Hz), Pin 11 = Grounded (Fast Rate) High RPM Mode (LRCFreq > 309 Hz), Pin 11 = Don't Care (LRC Mode is disabled)
NOTES: 1. 125 ms wide square wave pulse. 2. Maximum time = 2 minutes.
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VReg TC Vbat VPwr IQ1 IQ2 Vref O Vref TC SLoss(th) PTh PRot VUV VOV VLD
- -13 11.5 0.5 - - 1.1 1.7 -13 - 1.0 - 1.0 1.09(Vref) 1.33(Vref)
14.85 -11 14.85 1.2 1.3 - 1.25 2.0 -11 0.6 1.25 36 1.25 1.12(Vref) 1.4(Vref)
- - 9.0 16.5 2.0 2.0 3.0 1.4 2.3 - 9.0 1.0 1.5 - 1.5 1.16(Vref) 1.48(Vref)
V mV/C V V mA mA V V mV/C V V Hz V V V
f fosc
- 205
68 280
- 350
Hz kHz
StartDC OVDC LRCFreq LRCS LRCF LRCH
27 3.5 247 8.5 34 409
29 4.7 273 9.5 38 455
31 5.5 309 10.5 42 501
% % Hz %/sec %/sec %/sec
2
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Figure 1. Simplified Application
Sense Phase 86 k R3 250 1.0 k VCC 3 13 MTB36N06E (Q1) Power Supply 17 Gate 18 Source 3 Lamp Collector BSP52T1 (Q2) Lamp Control Logic 4 Lamp Base 5 Divide By (1/12/48) Ground Up/Down Counter (24) 10 Battery 2.5 sec 10 sec 11 Rate Ground 6 and 15 MR850 Ground Stator 500 2.0 k Lamp Ignition 20 k 2.0 k Field Charge Pump FB 1 UV 19 Bandgap Reference MC33092 Bias Undervoltage Load Dump Buff Signal Combiner and Switch Low Pass Filter Overvoltage Power Up/Down Circuit Vref 20 Vref O 8 VCC 1 14 B+ Supply
28 k
45 k
28 k
Lost Sense Circuit
2
Sense (Remote)
12
X1 Regulate Output Control Control Logic 12 8 DAC Prescaler (24 ) Counter (28 ) 4
Supply Reg (Local)
10 Counter
Phase
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Oscillator 9 Alternate Stator Configuration
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Figure 1.
R1
12.5 k
7
Oscillator 280kHz
R2
Osc. Adjust
RT
NOTES: R1 = R2 = 3.0 k to 5.0 k R3 = 10 k to 15 k RT = 50 k to 100 k
3
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Figure 2. Standby Current versus Temperature
0.8 I SB , STANDBY CURRENT (mA) V On , TURN-ON VOLTAGE (V) 0.7 0.6 0.5 0.4 0.3 0.2 - 55 ISB = Current from VCC Supply VCC = 12.8 V (see Figure 8) VC1 = 0.5 V (Ignition OFF) VPin 2 = VPin 12 = 1.5 V VPin 10 = VPin 11 = VPin 19 = 0 V 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 - 55 - 25 0 25 50 75 100 125 VON = Voltage at Pin 3 VCC = 12.8 V (see Figure 8) VPin 2 = VPin 12 = 1.5 V VPin 10 = VPin 11 = VPin 19 = 0 V
Figure 3. Turn-On Voltage versus Temperature
- 25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
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Figure 4. Reference Voltage versus Temperature
2.2 V ref , REFERENCE VOLTAGE (V) Vref = Voltage at Pin 20 VCC = 12.8 V (see Figure 8) VC1 = 0.5 V (Ignition OFF) VPin 2 = VPin 12 = 1.5 V VPin 10 = VPin 11 = VPin 19 = 0 V V ref O , 0TC REFERENCE VOLTAGE (V) 1.26 1.25 1.24 1.23 1.22 1.21 1.20 - 55
Figure 5. 0TC Reference Voltage versus Temperature
Vref O = Voltage at Pin 8 VCC = 12.8 V (see Figure 8) VC2 = 6.0 V (S1 Closed) VPin 2 = VPin 12 = 1.5 V VPin 10 = VPin 11 = VPin 19 = 0 V
2.1
2.0
1.9
1.8 - 55
- 25
0
25
50
75
100
125
- 25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 6. Oscillator Frequency versus Timing Resistor
110 100 90 80 70 60 200 VCC = 14.8 V (see Figure 8) VC2 = 6.0 V (S1 Closed) VPin 2 = VPin 10 = VPin 12 = VPin 19 = 1.5 V VPin 11 = 0 V 220 240 260 280 300 320 340 360 V Input , INPUT VOLTAGE (V) R = Resistance from Pin 7 to Ground f = Frequency at Pin 9 RT , RESISTANCE (k )
Figure 7. Input Voltage versus Output Duty Cycle
3.0 2.5 2.0 1.96 1.95 1.94 1.93 0 10 20 30 40 50 60 70 80 90 100 DC, DUTY CYCLE (%) Load Dump Protection Vin = Voltage at Pin 2 or 12 Duty Cycle taken at Pin 17 VCC = 14.8 V (see Figure 8) VC2 = 6.0 V (S1 Closed) VPin 10 = 1.5 V @ > 309 Hz VPin 11 = 0 V; VPin 19 = 1.5 V
f, FREQUENCY (kHz)
4
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Figure 8. Typical Test Circuit
VCC
250 FB 1 14 Power Supply Charge Pump 18 Source Buff 3 Power Up/Down Circuit VC1 Lamp Collector Output Control 10 Counter 12 DAC 4 Divide By (1/12/48) 7 Oscillator Rate 11 Oscillator Output 9 Prescaler (24) Counter (28) Control Logic 8 5 Up/Down Counter (24) Ground 2.0 k VC2 S1 4 Lamp Control Logic Lamp Base Overvoltage X1 Regulate 13 Bandgap Reference MC33092 Lost Sense Circuit Undervoltage 2 Signal Combiner and Switch Low Pass Filter Load Dump Bias VCC 1 VCC 3 UV Vref 19 20 Vref O 8 1.0 k
17 Gate 2.0 k
Sense (Remote) 12
Supply Reg (Local)
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Ground 6 and 15
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Phase
RT
Figure 8.
5
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PIN FUNCTION DESCRIPTION
Pin No. 1 2 FB Sense Function Description This pin provides a filtered result of the Sense input (if the Sense input is used) or the Supply Regulation input (if the Sense input is not used). The Sense input is a remote (Kelvin), low current battery voltage reference input used to give an accurate representation of the true battery voltage. This input is also used to monitor overvoltage or load dump conditions. This pin connects to the collector of the transistor (Q2) used to drive the fault lamp. It is also used to sense a closed ignition switch (voltage sense) which then turns power on to the IC. The Lamp Base pin provides base current to the fault lamp drive transistor (Q2). Grounded to provide a ground return for the fault lamp control logic circuit. IC ground reference pins. A resistor to ground on this pin adjusts the internal oscillator frequency (see Figure 6). This is a test point for the 1.1 V to 1.4 V reference voltage. It has a zero temperature coefficient. The reference is used internally for phase signal and undervoltage detection. Test point for checking the operation of the internal oscillator. The Phase input detects the existence of a magnetic field rotating within the alternator. The Rate pin is used to select a slow mode (floating) or fast mode (ground) Load Response Control recovery rate. The voltage on the Supply Regulation pin is used as a representation of the alternator output voltage. This input also used to monitor overvoltage or load dump conditions. Positive supply for the internal Charge Pump. Positive supply for the entire IC except for the Charge Pump. Ground reference for the IC. No connection. Controls the Gate of the MOSFET used to energize the field winding. Field winding control MOSFET source reference. If the voltage at this pin goes below 1.0 V, the fault lamp is guaranteed to turn on. The IC will continue to function, but with limited performance. Test point for the 1.7 V to 2.3 V Bandgap reference voltage. This voltage has a negative temperature coefficient of approximately -11 mV/C.
3 4 5 6, 15 7 8
Lamp Collector and Power-Up/Down Lamp Base Ground Ground Oscillator Adjust * VrefO * Oscillator Phase Rate Supply Regulation VCC3 VCC1 Ground N/C Gate Source Undervoltage * Vref
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9 10 11 12 13 14 15, 6 16 17 18 19 20
*NOTE: Pins 8, 9 and 20 are test points only.
6
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APPLICATION CIRCUIT DESCRIPTION
Introduction The MC33092A, designed to operate in a 12 V system, is intended to control the voltage in an automotive system that uses a 3 phase alternator with a rotating field winding. The system shown in Figure 1 includes an alternator with its associated field coil, stator coils and rectifiers, a battery, a lamp and an ignition switch. A tap is connected to one corner of the stator windings and provides an ac signal for rotation (phase) detection. A unique feature of the MC33092A is the Load Response Control (LRC) circuitry. The LRC circuitry is active when the stator winding ac signal frequency (phase buffer input signal, Pin 10) is lower than the Low/High RPM transition frequency. When active, the LRC circuitry dominates the basic analog control circuitry and slows the alternator response time to sudden increases in load current. This prevents the alternator from placing a sudden, high torque load on the automobile engine when a high current accessory is switched on. The LRC circuitry is inactive when the stator winding ac signal frequency is higher than the Low/High RPM transition frequency. When the LRC circuitry is inactive, the basic analog control circuitry controls the alternator so it will supply a constant voltage that is independent of the load current. Both the LRC and analog control circuits control the system voltage by switching ON and OFF the alternator field current using Pulse Width Modulation (PWM). The PWM approach controls the duty cycle and therefore the average field current. The field current is switched ON and OFF at a fixed frequency by a MOSFET (Q1) which is driven directly by the IC. The MC33092A uses a charge pump to drive the MOSFET in a high side configuration for alternators having a grounded field winding. A fault detector is featured which detects overvoltage, undervoltage, slow rotation or non-rotation (broken alternator belt) conditions and indicates them through a fault lamp drive output (Pin 4). A Load Dump protection circuit is included. During a load dump condition, the MOSFET gate drive (Pin 17) and the fault lamp drive output are disabled to protect the MOSFET, field winding and lamp. Power-Up/Down Power is continuously applied to the MC33092A through VCC1 and VCC3. A power-up/down condition is determined by the voltage on the Lamp Collector pin (Pin 3). When this voltage is below 0.5 V the IC is guaranteed to be in a low current standby mode. When the voltage at Pin 3 is above 2.0 V, the IC is guaranteed to be fully operational. The power-up voltage is applied to Pin 3 via the ignition switch and fault lamp. In case the fault lamp opens, a 500 bypass resistor should be used to ensure regulator IC power-up. A power-up reset circuit provides a reset or set condition for all digital counter circuitry. There is also a built-in power-up delay circuit that protects against erratic power-up signals. Battery and Alternator Output Voltage Sensing The battery and the alternator output voltage are sensed by the remote (Sense, Pin 2), and the local (Supply Regulator, Pin 12) input buffer pins, respectively, by way of external voltage dividers. The regulated system voltage is determined by the voltage divider resistor values. Normally the remote pin voltage determines the value at which the battery voltage is regulated. In some cases the remote pin is not used. When this condition (VPin 2 < 0.6 V typically) exists, a sense loss function allows the local pin voltage to determine the regulated battery voltage with no attenuation of signal. If, however, when the remote pin is used, and the voltage at this pin is approximately 25% less than the voltage at the local sense pin (but greater than 0.6 V, typically), the value at which the battery voltage is regulated is switched to the local sense pin voltage (minus the 25%). The signal combiner/switch controls this transfer function. Low Pass Filter, DAC & Regulator Comparator The output of the combiner/switch buffer feeds a low pass filter block to remove high frequency system noise. The filter output is buffered and compared by the regulator comparator to a descending ramp waveform generated by an internal DAC. When the two voltages are approximately equal, the output of the regulator comparator changes state and the gate of the MOSFET is pulled low (turned OFF) by the output control logic for the duration of the output frequency clock cycle. At the beginning of the next output clock cycle, the DAC begins its descending ramp waveform and the MOSFET is turned ON until the regulator comparator output again changes state. This ongoing cycle constitutes the PWM technique used to control the system voltage. Oscillator The oscillator block provides the clock pulses for the prescaler-counter chain and the charge control for the charge pump circuit. The oscillator frequency is set by an external resistor from Pin 7 to ground as presented in Figure 6. The prescaler-counter divides the oscillator frequency by 212 (4096) and feeds it to the output control logic and divider-up/down counter chain. The output control logic uses it as the fundamental regulation output frequency (Pin 17). Load Response Control The Load Response Control (LRC) circuit generates a digital control of the regulation function and is active when the stator output ac signal (Pin 10) frequency is lower than the Low/High RPM transition frequency. The LRC circuit takes the output signal of the prescaler-counter chain and with a subsequent divider and up/down counter to provide delay, controls the alternator response time to load increases on the system. The response time is pin programmable to two rates. Pin 11 programs the divider to divide by 12 or divide by 48. If Pin 11 is grounded, the signal fed to the up/down counter is divided by 12 and the response time is 12 times slower than the basic analog response time. If Pin 11 is left floating, the signal to the up/down counter is divided by 48 and the response time is 48 times slower. The basic analog (LRC not active) and digital duty cycle control (LRC active) are OR'd such that either function will terminate drive to the gate of the MOSFET device with the shortest ON-time, i.e., lower duty cycle dominating.
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The digital ON-time is determined by comparing the output of the up/down counter to a continuous counter and decoding when they are equal. This event will terminate drive to the MOSFET. A count direction shift register requires three consecutive clock pulses with a state change on the data input of the register to result in an up/down count direction change. The count will increase for increasing system load up to 100% duty cycle and count down for decreased loading to a minimum of 29% duty cycle. The analog control can provide a minimum duty cycle of 4 to 5%. The initial power-up duty cycle is 29% until the phase comparator input exceeds its input threshold voltage. Also, the IC powers up with the LRC circuit active, i.e., when the Lamp Collector pin exceeds the power-up threshold voltage. Fault Lamp Indicator Pins 3 and 4 control the external Darlington transistor (Q2) that drives the fault indicator lamp. A 10 resistor should be placed in series with the transistor's emitter for current limiting purposes. The fault lamp is energized during any of the following fault conditions: 1) No Phase buffer (Pin 10) input due to slow or no alternator rotation, shorted phase winding, etc.; 2) Phase buffer input ac voltage less than the phase detect threshold; 3) Overvoltage on Pin 2, or Pin 12 if Pin 2 is not used, or 4) Undervoltage on Pin 19 with the phase buffer input signal higher than the Low/High RPM transition frequency. Phase Buffer Input A tap is normally connected to one corner of the alternator's stator winding to provide an ac voltage for rotation detection. This ac signal is fed into the phase buffer input (Pin 10) through a voltage divider. If the frequency of this signal is less than the phase rotation detect frequency (36 Hz, typically), the fault lamp is lit indicating an insufficient alternator rotation and the MOSFET drive (Pin 17) output duty cycle is restricted to approximately 29% maximum. Also, if the peak voltage of the ac signal is less than the phase detect threshold, the fault lamp is lit indicating an insufficient amount of field current and again the MOSFET drive (Pin 17) output duty cycle is restricted to approximately 29% maximum. Undervoltage, Overvoltage and Load Dump The low pass filter output feeds an undervoltage comparator through an external voltage divider. The voltage divider can be used to adjust the undervoltage detection level. During an undervoltage condition, the fault lamp will light only if the phase buffer input signal frequency is higher than the Low/High RPM transition frequency. This is to ensure that the undervoltage condition is caused by a true fault and not just by low alternator rotation. To help maintain system voltage regulation during an undervoltage condition, the output duty cycle is automatically increased to 100%. Even though the fault lamp may be energized for an undervoltage condition, the MC33092A will continue to operate but with limited performance. Through an internal voltage divider, the low pass filter feeds an overvoltage comparator which monitors this output for an overvoltage condition. If the overvoltage threshold is exceeded, the fault lamp is lit and the MOSFET drive (Pin 17) output duty cycle is restricted to approximately 4% maximum. The internal voltage divider on the input to the load dump comparator has a different ratio than the divider used on the overvoltage comparator. This allows the load dump detect threshold to be higher than the overvoltage threshold even though both comparators are monitoring the same low pass filter output. If the load dump detect threshold is exceeded, the fault lamp and MOSFET drive outputs are disabled to protect the MOSFET, field winding and lamp.
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OUTLINE DIMENSIONS
DW SUFFIX PLASTIC PACKAGE CASE 751D-04 (SO-20L) ISSUE E
11
-A-
20
-B-
1 10
10X
P 0.010 (0.25)
M
B
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029
20X
D
M
0.010 (0.25)
TA
S
B
J
S
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F R C -T-
18X SEATING PLANE X 45 _
G
K
M
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NOTES
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